The present invention relates to a semiconductor device and its semiconductor manufacturing technology and particularly, to technology effective when applied to a semiconductor device having a joint at which a bonding pad formed on the front surface of a semiconductor chip and an external terminal are electrically connected via a bump electrode.
For example, Japanese Patent Laid-Open No. 2008-47836 (Patent Document 1) describes a semiconductor device in which an optical semiconductor element, a metal plate used as an external terminal, and a bump are covered with a resin and discloses an aspect in which the respective lower-surfaces of the metal plates are located over a common virtual plane and exposed without being covered with the resin.
Further, Japanese Patent Laid-Open No. 2006-93556 (Patent Document 2) describes a semiconductor device including a terminal including a flat wire including an electrolytic plated layer joined to a metal bump, a bed part having a heat dissipating structure joined to a second main surface of a semiconductor element, and a resin sealing body that seals the semiconductor element and the metal bump and discloses that each surface of the electrolytic plated layer and the bed part is exposed from the resin sealing body.